Hybrid analog/digital VLSI chip for template matching

A template matching algorithm, its hybrid analog/digital VLSI implementation, and test results from prototype chips are presented. The inputs to the system are analog values of the pixels of both the template and the region to be matched. The output is a digital code identifying the best match. This hybrid implementation offers two advantages: First, the low-level computationally-intensive template matching task is carried out in analog VLSI with circuits operating in the subthreshold region of transistor operation. The chip consequently consumes very little power. Second, the coded output is digital and hence provides direct interface capability to conventional digital computers. A complete system based on this chip would find numerous applications in edge detection, stereo and motion correspondence, as well as in pattern recognition.