Efficient DSP design for vocoder application

Vocoder is a key component of the digital cellular system. A DSP architecture which supports the direct and immediate addressing modes in one instruction cycle, combined with a RISC-style instruction set, turns out to be effective for vocoder implementation in terms of proper performance and lower power consumption requirements. By adopting a dual bank memory system and an efficient ALU bus scheme, two 16-bit operand access and ALU operation can be executed simultaneously. Improved implementation methods applicable to CELP type vocoder in which the pitch search is performed by the analysis-by-synthesis, are also presented.