XOR realization using KH-map

Logic design using XOR gates is becoming more popular due to testability and cost effectiveness. For the design of logic circuits, the K-map is still an unparallel tool to a logic designer. Due to the geometric constraints of the K-map, the derivation of the XOR relation is not as simple as those incorporating the AND-OR relation. However, for large problems one must rely on a mechanical approach such as computer simulation where intuition is less effective. The KH-map is a newly proposed technique for mapping large logic functions in a limited physical system and offers a better way of realizing minimized logic functions. This paper gives some rules that can be effectively used in realizing XOR-relations from an KH-map.