High-speed FDTD simulation algorithm for GPU with compute unified device architecture

In this paper, we propose a high-speed FDTD algorithm for GPU. Our algorithm includes two important techniques: coalesced global memory access on a GPU board and the improved cache block algorithm for GPU which resembles that for the central processing unit (CPU). Our algorithm achieved an approximately 20- fold improvement in computational speed compared with a conventional CPU at the maximum computational speed of the GPU.