The tunnel source MOSFET: A novel asymmetric device solution for ultra-low power applications

With aggressive MOSFET scaling, short channel effects (DIBL and V
TH
roll-off), off-state and gate leakage, parasitic capacitance and resistance severely limit the device performance. These, in addition to V
DD
scaling limitation and high sub-threshold swing (≫60mv/dec) give rise to high I
OFF
and make power dissipation, both dynamic and static, an enormous challenge, especially for low power/low current applications. New device innovations are essential to achieve low I
OFF
by having steep sub-threshold behavior for low power applications. Towards this end, a novel asymmetric Tunneling Source MOSFET is proposed in this paper. The main feature of this device is the concept of gate controlled carrier injection through band-to-band tunneling at the source junction. This novel device has the potential for steep sub-threshold behavior (≪60mv/dec), improved I
ON
/I
OFF
and high R
OUT
and gain (g
m
× R
OUT
) at low bias currents. It also possesses excellent immunity against short channel effects which improves scalability into sub-50nm regime and makes it an attractive candidate for low power digital and analog operations.