An architectural exploration framework for efficient FPGA implementation of PLC programs

This paper presents an automated framework for obtaining high-performance FPGA implementations of industrial automation and control algorithms coded as PLC programs. The proposed method is mainly targeting demanding applications, requiring lots of numerical computations. Based on previous experience, the proposed framework exploits electronic system level modeling methodologies and tools for high-level hardware synthesis. Since most of these tools are not compatible with PLC development environments, custom translating software built by using standard compiler techniques, can be employed for converting PLC programs to a form that can be understood by the selected tools. Furthermore, the translating software uses different coding templates to support microarchitectural level design trade-offs. Experimental results involving three well-known industrial control algorithms show that appropriate coding styles can offer 2x performance improvements, being simple and syntactically similar to Statement List code.