The evolution of interconnect management in physical synthesis

With the worsening of interconnects due to scaling, the reliance of the original physical synthesis paradigm on merely some placement of the cells in order to predict net delays no longer suffices. Practitioners have augmented this paradigm over the years with increasingly sophisticated net models in an effort to improve the accuracy of the interconnect delay predictions. In this paper, we will review these advances and motivate their natural evolution towards "guaranteed" net delays by describing a new scheme known as persistence. Although a naive implementation of persistence can result in unroutable circuits, we will describe how persistence can be applied intelligently in an industrial flow to improve the circuit optimization without impacting its congestion.