0.15µm BiC-DMOS technology with novel stepped-STI N-channel LDMOS

We developed a state-of-the-art BiC-DMOS process using 0.15µm technology. High-voltage MOSFETs were embedded in our standard 0.15µm CMOS process with a 0.13µm high density NVM. More intelligent mixed signal devices can flexibly be realized by this technology. Moreover, the reliability of n-ch LDMOS is markedly improved by the novel structure of stepped-STI LDMOS.