Influence of tilted high-energy ion-implantation upon scaled CMOS structure

Retrograde well needs a thick resist mask and ions should be implanted into a wafer at a tilt angle to minimize channeling, therefore, "mask edge shadowing" becomes serious. We evaluated the influence of the angle of ion-implantation on Vth shifts of MOSFETs when source/drain-well spacing becomes small. It is known that when the nsd-nwell spacing becomes small, nwell impurities diffuse laterally to NMOS channel regions. That causes Vth lowering. But we found out a new phenomenon that Vth rises when the nsd-pwell spacing becomes small. That is caused by penetration of high-energy ions for well formation through the mask edge. The angle of ion-implantation for the well formation is influential on Vth of MOSFETs nearby the mask edge. The ion-implantation at 0/spl deg/ tilt angle is desired.