A 90nm CMOS bio-potential signal readout front-end with improved powerline interference rejection

This paper describes a 90 nm CMOS low-noise low-power biopotential signal readout front-end (RFE). The front-stage instrumentation amplifier (IA) features a chopper; an AC-coupler and a novel chopper notch filter for minimizing the DC-offset; transistors' flicker noise and 50 Hz powerline interference concurrently. A noise-aware transistor selection (thin- and thick-oxide) in the IA enables a flexible tradeoff between noise and input impedance performances. The 2
^nd
stage is a spike filter clocked by a parallel use of two non-overlapping clock generators, effectively tracking and suppressing the chopper spikes. The last stage is a gain-bandwidth-controllable amplifier for boosting the gain and alleviating different bio-potential signal measurements through simple digital controls. Simulation results showed that the RFE is capable of tolerating a differential electrode offset up to plusmn50 mV, while achieving 140 dB CMRR and 51.4 nV/radicHz inputreferred noise density. The notch at 50 Hz achieves 41dB rejection. The entire RFE consumes 16.55 to 35.5 muA at 3V.