A baseband processor for IS-54 cellular telephony

This paper describes the design of a baseband processor for IS-54 North American cellular telephony standard. The effect of diverse circuit impairments on the error vector in digital mode and on the parasitic amplitude modulation in analog mode are analyzed. An analog offset compensation scheme, which takes advantage of the TDMA operation, is presented. The device incorporates a Manchester data decoder for data transmission in analog mode. The messages can be sent via two interfaces to the DSP or /spl mu/-processor. The architecture of the digital signal processing chain is discussed. The device is fabricated in a 0.9 /spl mu/ CMOS technology with an area of 40 mm/sup 2/.