Joule heating effects on the current carrying capacity of an organic substrate for flip-chip applications

This paper deals with the thermal effects of joule heating in a high interconnect density, thin core, buildup, organic flip chip substrate. The 535µm thick substrate consists of a 253 µm thick core with via density of about 200 µm. The typical feature sizes in the substrate are 50 micron diameter vias is the core/buildup layers and 12 micron thick metal planes. An experimental test vehicle was powered with current and the temperature rise was measured. A numerical model was used to simulate the temperature rise in the TV. Good agreement between the test results and model was established. The numerical model was then used to simulate via and substrate temperature rise by varying a variety of parameters. Using typical arrangements for via distribution, it is shown that currents in excess of 500A can be supplied to a 16mm chip using the thin core organic substrate technology while limiting the maximum via temperature rise to less than 10C above the chip temperature. For the typical design studied, this translates to a chip power density of 2.3W/mm
²
with the chip core operating at 1V.