MANNA: prototype of a distributed memory architecture with maximized sustained performance

The sustained performance of superscalar microprocessors amounts to only a fraction of their peak performance rating. In parallel computers realized with them this discrepancy is even more dramatic. Reaching a satisfactory sustained performance for the single processor is mainly a compiler problem. The sustained performance of parallel computers depends also on other components of the architecture such as the interconnect and the operating system. It is shown how, through a combination of innovative architectural solutions, the sustained performance of a distributed memory parallel computer can be significantly improved. The key to effective latency hiding by overlapping communication and computation is the operating system. The programmability of such architectures can be enhanced by providing the programmer with parallelizing compilers and/or a global address space provided by virtual shared memory. All these measures have been incorporated in the MANNA computer described in the paper. Benchmark performance figures obtained with it are reported.