Simulating asynchronous architectures on transputer networks

Recently, there has been a resurgence of interest in asynchronous design techniques due to the potential of asynchronous logic for higher performance, power efficiency and immunity from clock related timing problems. Occam, a CSP based parallel language provides for the rapid development of asynchronous architectural simulation models which may then be executed on a transputer network to achieve high performance. The paper discusses issues related to the design and execution of such models.