Experiments in sub-micron CMOS technology: the JISI project

This paper describes a set of micro-electronics experiments implemented in a 0.7 /spl mu/m CMOS integrated circuit used for the training of graduate students. A set of 10 experiments are implemented on the chip and include basic devices such as MOS transistors, diodes, and silicon sensors, as well as design oriented experiments (complex gates, latches) and analog experiments (operational amplifiers, crosstalk sensors, voltage controlled oscillators). The chip, named JISI has been fabricated in various CMOS technologies for performance evaluation with the technology scaling down.