On the applicability of the transimpedance amplifier concept for 40 Gb/s optoelectronic receivers based on InAlAs/InGaAs heterostructure field effect transistors

We examine the design considerations and include a general discussion of the applicability of the transimpedance amplifier concept for optoelectronic receivers at extremely high bit rates up to 40 Gb/s. The receiver design is based on a low gate-leakage InAlAs-InGaAs-InP heterostructure field effect transistor (HFET). The noise modeling of these devices is done using an extended temperature noise model in order to produce a reliable extrapolation far beyond the frequency limits of common measurement setups. The fitted transistor model shows excellent agreement with measured data concerning RF as well as the noise performance. The evidence of inductive peaking near the corner frequency of the transimpedance Z_/sub T/ is correlated to a phase difference between the voltage gain V_/sub u/ and Z_/sub T/ itself. Furthermore, the distinct influence of the length of the feedback line on the receiver performance is discussed. Based on 0.7 /spl mu/m gate HFETs produced by optical lithography and offering a current gain cut off frequency of f/sub T/=40 GHz the following receiver features can be predicted: low frequency transimpedance Z_/sub T0/=39.4 dB/spl Omega/, corner frequency f/sub 3dB/=22 GHz, mean equivalent input noise current density i~/sub na//spl ap/43 pA//spl radic/Hz. Thus the receiver shows an excellent calculated sensitivity of /spl eta/P/sub min/=-13.2 dBm at 40 Gb/s.