A reconfigurable demodulator with 3-to-5GHz agile synthesizer for 9-band WiMedia UWB in 65nm CMOS

Receiver ICs realized in CMOS technology leverage the narrowband nature of wireless standards to meet specifications at low power levels. The advent of wideband systems, e.g. software-defined radios and UWB technology, is determining new emphasis on innovative techniques for key RF circuit blocks, and on synthesizers in particular [1–4]. Ring-oscillator-based solutions lend themselves to wideband operation but the signal quality at moderate power consumption is usually inadequate, while LC-tank-based oscillators do not cover the range requiring multiple VCOs. Sum and difference frequencies can be generated from a single VCO and its divided replica by means of SSB mixers. Unfortunately, significant spurious tones are created due to non-idealities in the mixers. As an alternative, RF signals belonging to a wide frequency range can be demodulated in a single receiver chain by means of a downconverter, reconfigured between conventional and subharmonic operation modes. In this way, the local oscillator is required to cover only a fraction of the frequency range, demodulating the lower portion in conventional mode and the upper in subharmonic mode. For subharmonic downconversion, 4 differential phases of the same reference are needed but the advantage of the lower frequency range of operation outweighs the added complexity.