Research on Harmonics Suppression in High Power Middle Frequency 400Hz Inverter

The low ratio of device switching frequency to output voltage fundamental frequency in high power middle frequency 400 Hz/115 V inverters results in new problems in harmonics suppression. A single-phase inverter based on the cascaded topology with two H-Bridge units which can reduce harmonics content in output voltage was presented. After the harmonics formula of multilevel PWM wave was derived, the output LC filter was designed to eliminate high-order modulation harmonics considering simultaneously the fundamental voltage drop across the filter inductor and the inductor current ripple. Proportional- resonant control was adopted which can eliminate steady-state error and compensate the 3
^rd
, 5
^th
and 7
^th
harmonics. Analysis and simulation on a single-phase 100 kW middle frequency inverter model were presented. The simulation verified the effectiveness of the proposed scheme.