Abstract:
A digital differential transmitter based on CMOS inverter worked up to 2.8Gbps at the supply voltage of 1V with a 0.18μm CMOS process. By calibrating the output impedance...Show MoreMetadata
Abstract:
A digital differential transmitter based on CMOS inverter worked up to 2.8Gbps at the supply voltage of 1V with a 0.18μm CMOS process. By calibrating the output impedance of the transmitter, the impedance matching between the transmitter output and the transmission line is achieved. The PVT variations of pre-driver are compensated by the calibration of the pull-up and pull-down driving strength. The chip fabricated with a 0.18μm CMOS process gives the highest data rate of 4Gbps at the supply voltage of 1.2V. The proposed calibration schemes improve the eye opening with the voltage margin by 200% and the timing margin by 30%, at 2.8Gbps and 1V.
Published in: 2008 International SoC Design Conference
Date of Conference: 24-25 November 2008
Date Added to IEEE Xplore: 17 April 2009
ISBN Information: