Self-Aligned n-channel MOSFET on InP and In0.53Ga0.47As Using Physical Vapor Deposition HfO2 and Silicon Interface Passivation Layer

Research on high-k (HfO
₂
) materials has been expanded significantly. However, MOSFETs with high-k gate dielectrics on silicon still have several problems with relatively low mobility of high-k devices in thin EOT regime compared to the universal curve. In this work, as an alternative of silicon substrate, InP and In
_0.53
Ga
_0.47
As has been studied. W e present the material and electrical characteristics of TaN/HfO
₂
/InP self-aligned n-MOSFET with PVD Si interface Passivation layer (IPL) under various post deposition anneal (PDA) conditions. We also demonstrated N-channel high-k InP and In
_0.53
Ga
_0.47
As MOSFETs with good transistor behavior.