Nanowire FETs for low power CMOS applications featuring novel gate-all-around single metal FUSI gates with dual Φm and VT tune-ability

A simple and cost-effective single metal gate scheme was successfully demonstrated to form gate-all-around (GAA) nanowire FETs with optimized dual V
_T
for low power CMOS applications. FUSI gate-induced stress effects were shown to be of great relevance to device performance. At an I
_Off
of 20 pA/mum, superior I
_On
of 1180 and 405 muA/mum were obtained for NFETs and PFETs at a V
_DD
of 1.2 V.