Electron mobility in multiple silicon nanowires GAA nMOSFETs on (110) and (100) SOI at room and low temperature

For the first time, electron mobility characteristics in Si nanowires (NWs) on (110)-orientated SOI have been measured directly by split C-V method based on fabricated multiple NW gate-all-around (GAA) nMOSFETs. It is found that electron mobility in [110]-directed (110) nanowires approaches to and is even higher than that in [100]-directed (110) nanowires. Also, physical mechanisms that dominate mobility degradation in nanowires have been investigated at low temperature, showing increasing surface roughness scattering in narrower nanowires. At the same time, dasiadouble peakpsila phenomenon in NW mobility at low temperature of 100 K is observed for the first time and shows dependence on nanowire width (W
_nw
). Underlying physical mechanisms are investigated and discussed.