Improved effective switching current (IEFF+) and capacitance methodology for CMOS circuit performance prediction and model-to-hardware correlation

New effective drive current I
_EFF

⁺
methodologies are demonstrated in this paper to address predictability of circuit performance across wide Vt range and accuracy of effective resistance R
_EFF
prediction-to-hardware correlation. Two separate I
_EFF
definitions are adopted for delay performance prediction (I
_EFF
= [I
_H
+ I
_L
]/2), and ring AC/DC prediction-tohardware correlation analysis (I
_EFF

⁺
= [1.15I
_H
+ I
_L
+ G
_DS,LIN
* VDD/80]/2). I
_EFF

⁺
results in perfect matching in ring AC and DC effective resistance across SOI and bulk technologies. I
_EFF
combined with Vt-dependent effective switching capacitance (C
_{EFF_Delay}
) also leads to good match between predicted performance and spice simulation across wide Vt range using simple CMOS device parameters.