Reliability for "Future" Devices

Device design has enjoyed over three decades of scaling leaving the fundamental device architecture basically unchanged. With SiO₂ gate dielectric hovering around 1 nm for the high performance space device engineers looked at different methods than scaling for performance boost. Stress enhancement of mobility is a prime example for a non scaling based performance booster. With the successful implementation of high-k dielectrics there is hope that the path to scaling is opened up again. In spite of the rapid advancement in gate dielectric scaling, most likely fully depleted devices will be needed to continue the density scaling of the past. We discussed some of the challenges and opportunities that are related to the change of device architecture and requirements to continue the trend in integration density. The presentation outlined the path down to the ultimate FET device.