Power-time tradeoffs in digital filter design and implementation

In this paper, a comparison is made between the average power dissipation of FIR, IIR and lattice wave digital filters meeting the same specifications. The power dissipation of various architectures is estimated and tradeoffs between the sample rate and power are performed by varying the degree of pipelining and concurrency. Estimation of the power dissipation is done at a high-level, avoiding common problems.