A novel SoC architecture for a MVB slave node

The standardization of train communications protocols, train communication network (TCN), has created a need to design new electronic devices which can communicate according to them. Up to date, several solutions have been suggested, but every one needs additional circuits. In this article we present a novel flexible architecture which allows the materialization of slave nodes for multifunction vehicle bus (MVB) in a single chip by using reconfigurable logic. Furthermore, a software for definition of specialized architecture for each type of slave node is proposed. The generic architecture includes two standard onchip busses, which are aimed at interconnecting all the modules as cores attached to them by an established interface. In this way, creation flow can be concurrent, and design for reuse is made easier. As a result, the electronic platform for the slave device has been generated on a field-programmable gate array, FPGA.