The SVX2 readout chip

A new readout chip called SVX2 is being designed for silicon detector systems at Fermilab. SVX2 is essentially an upgrade of the presently used SVX chip and contains extensive performance and feature enhancements. SVX2 is designed to accommodate much shorter beam crossing times (132 ns to 400 ns) with minimal increase in noise and power. Analog signal delay is formed by a double correlated sampling pipeline in order to allow time for trigger formation. Signal digitization of up to eight bits is performed on the chip with an A/D converter per channel. This allows threshold setting, sparsification, and readout to be purely digital. Design philosophy is discussed and test results presented.<
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