A wide-range all-digital multiphase DLL with supply noise tolerance

An 80-to-832 MHz all-digital 8-differential-phase DLL in a 0.18 um CMOS process has been developed to achieve low-jitter and supply noise tolerance using dual window phase detector, noise tolerant delay cell and delay compensation under supply noise. The proposed DLL occupies 0.19 mm
²
and dissipates 48 mW at 832 MHz from a 1.8 V supply. The peak-to-peak jitter and rms jitter are 12 ps and 1.73 ps with a quiet supply at 832 MHz, respectively. The peak-to-peak and rms jitter with a 100 mV peak-to-peak triangular supply noise at 100 MHz are 21 ps and 2.99 ps, respectively.