Low Energy On-Line SBST of Embedded Processors

Software-based self-test (SBST) has emerged as an effective strategy for on-line testing of processors integrated in non-safety critical applications. Among the various systems that fall in the previous category, wireless sensor networks (WSN) are often deployed in harsh environments where the possibility of permanent and especially intermittent faults due to environmental hazards is significantly increased, thus on-line and in-field testing is necessary to guarantee the accuracy of the sensed values. At the same time, on-line testing of processors integrated in WSN has the extra requirement of minimum energy consumption, because these devices are operating on battery, cannot be connected to any external power supply, and the battery duration determines the lifetime of the system. In this paper we present a methodology for the optimization of SBST routines from the energy perspective. Techniques utilized for achieving energy reduction include energy aware loop synthesis, loop transformations, instruction substitution and register renaming. Simulation results show that the energy savings at processor level are up to 35.6%.