Distributed RLGC transient model of coupled interconnects in DSM chips for crosstalk noise simulation

Noise effects in coupled interconnects, i.e. crosstalk induced glitch and crosstalk induced delay can significantly impact the performance of deep sub-micron (DSM) chips. Therefore, in this paper distributed RLGC transient model of coupled interconnects has been developed that will be useful for analyzing such crosstalk noise effects in DSM chips. The model accuracy is quite comparable to the PSPICE simulation results and yet the simulation speed is at least 11 times faster than the latter.