The third revolution in semiconductor packaging and system integration

We are crossing the threshold of the third revolution in semiconductor packaging. In the ’80s, Surface Mount Technology (SMT) had major impact in size reduction of all electronic systems. In the ’90s the Ball Grid Array (BGA) package has been introduced, whose latest evolution allows further dramatic steps in miniaturization: the cost effective integration of a large number of passive and active devices in the same package (System in Package - SiP). It is now evident that BGA gets close to its intrinsic limits and will not be able to serve the requirements (size, speed, thermal dissipation, cost) of next advanced systems, like those under design for future wireless applications. At present, most of R&D effort is dedicated to the development of new concepts, mixing conventional assembly and “on wafer” processes. The result is the “3D Wafer Level Package” platform, which is expected to provide unprecedented levels of integration, while requiring several breakthroughs in design, manufacturing infrastructure, supply chain.