MEMS wafer-level vacuum packaging with transverse interconnects for CMOS integration

A novel vacuum wafer-level packaging technology for micro-electromechanical systems (MEMS) is presented. It supports monolithic integration with electronics, and is suitable for different MEMS processes. Bulk-etched transverse feedthroughs are used to connect with the encapsulated systems. Silicon carbide is successfully used for membrane stress cancellation and improved hermeticity.