IC design-for-test and testability features

IC test is at a mature state where automated tools are used for DFT feature insertion and pattern generation. This paper summarizes the most common digital IC design-for-test (DFT) techniques in use today. Most of the focus is on testing and validating the correct operation of ICs after fabrication. However, many of the IC DFT features can also be re-used in higher level test and in the field. In addition, some of the concepts in the well known strategies used for IC testing may be also effective for higher level of assembly test. Some of the topics presented on include scan, automatic test pattern generation (ATPG), boundary scan, built-in self-test (BIST), memory BIST and repair, secure IC test, diagnostics, and test challenges.