Capping-metal gate integration technology for multiple-VT CMOS in MuGFETs

In this paper, we investigate the potentialities and properties of HfSiO/MG/cap/TiN gate stack devices, first by identifying the impact of the TiN thickness and its deposition procedure on the device characteristics, and by exploring the use of TaN vs. TiN as the 1
^st
metal layer (MG). Deeper insight into the caps (e.g., Dy) diffusion mechanism is gained by: a) demonstrating stronger diffusion dependence on the metal growth method than on its composition; b) studying the BTI behavior through a careful monitoring of the transients.