Carrier Transport in High-Mobility III–V Quantum-Well Transistors and Performance Impact for High-Speed Low-Power Logic Applications

DC and high-frequency device characteristics of $\hbox{In}_{0.7} \hbox{Ga}_{0.3}\hbox{As}$ and InSb quantum-well field-effect transistors (QWFETs) are measured and benchmarked against state-of-the-art strained silicon (Si) nMOSFET devices, all measured on the same test bench. Saturation current $(I_{\rm on})$ gain of 20% is observed in the $\hbox{In}_{0.7}\hbox{Ga}_{0.3}\hbox{As}$ QWFET over the strained Si nMOSFET at $(V_{g} - V_{t}) = \hbox{0.3}\ \hbox{V}$, $V_{\rm ds} = \hbox{0.5}\ \hbox{V}$, and matched $I_{\rm off}$, despite higher external resistance and large gate-to-channel thickness. To understand the gain in $I_{\rm on}$ , the effective carrier velocities $(\nu_{\rm eff})$ near the source-end are extracted and it is observed that at constant $(V_{g} - V_{t}) = \hbox{0.3}\ \hbox{V}$ and $V_{\rm ds} = \hbox{0.5}\ \hbox{V}$ , the $\nu_{\rm eff}$ of $\hbox{In}_{0.7}\hbox{Ga}_{0.3}\hbox{As}$ and InSb QWFETs are 4–5$\times$ higher than that of strained silicon (Si) nMOSFETs due to the lower effective carrier mass in the QWFETs. The product of $ \nu_{\rm eff}$ and charge density $(n_{s})$, which is a measure of “intrinsic” device characteristics, for the QWFETs is 50%–70% higher than strained Si at low-voltage operation despite lower $n_{s}$ in QWFETs. Calibrated simulations of $\hbox{In}_{0.7}\hbox{Ga}_{0.3}\hbox{As}$ QWFETs with reduced gate-to-channel thickness and external resistance matched to the strained Si nMOSFET suggest that the higher $\nu_{\rm eff}$ will result in more than 80% $I_{\rm on}$ increase over strained Si nMOSFETs at $V_{\rm ds} = \hbox{0.5}\ \hbox{V}$, $(V_{g} - V_{t}) = \hbox{0.3}\ \hbox{V}$, and matched $I_{\rm off}$, thus showing promise for future high-speed and low-power logic applications.