Vertical Structure NAND flash array integration with paired FinFET multi-bit scheme for high-density NAND flash memory application

Multi-bit Vertical Structure NAND (VsNAND) Flash memories with 32-paired FinFET cell string have been successfully integrated for the first time. Its array integration issues regarding the sub-10nm vertical structure fin could be solved by proper choices of isolation material, ion implantation, and word line patterning. VsNAND Flash array cells with TANOS (TaN/Al
2
O
3
/SiN/SiO
x
/Si) charge trap structure show possibilities of acceptable program/erase properties and cell Vth distribution characteristics for multi-level NAND Flash application.