Novel co-design of NAND flash memory and NAND flash controller circuits for sub-30nm low-power high-speed solid-state drives (SSD)

Three new circuit technologies, selective bit-line precharge scheme, advanced source-line program, and intelligent interleaving are proposed. By co-designing NAND flash memory and NAND controller circuits, both NAND and NAND controllers are best optimized. At sub-30nm generation, the SSD speed improves by 150% without a cost penalty or circuit noise. Keywords: SSD, NAND, Flash, controller