A 5GHz fully integrated super-regenerative receiver with on-chip slot antenna in 0.13μm CMOS

A single chip receiver based on super-regeneration incorporates an on-chip slot antenna and digital received data synchronization. A capacitively-loaded standing-wave resonator improves energy efficiency. An all-digital PLL timing scheme synchronizes the received data clock. The prototype 5GHz receiver, implemented in 0.13μm CMOS, achieves a data rate of up to 1.2Mb/s, dissipates 6.6mW from a 1.5V supply, and occupies a die area of 2.4mm
²
.