Performance of CMOS Schmitt Trigger

This paper presents the effect of load capacitance and source voltage on performance of proposed Schmitt trigger circuit. The proposed circuit was designed based on Conventional Schmitt Trigger by manipulating the arrangement of transistors and the width-length ratio. All simulation results have been carried out based on Microwind software on three different designs in term of propagation delay, Energy-delay Product and hystheresis. From the result, the proposed full swing CMOS Schmitt Trigger was able to operate as low voltage (0.8 V-1.5 V).