Simple Statistical Analysis Techniques to Determine Optimum Sense Amp Set Times

Statistical analysis techniques are described, involving a relatively small number of actual circuit simulations, to accurately determine the optimum sense amp set time for SRAM designs. Techniques to generate and evaluate the statistical distributions for bit line leakage, signal development, sense amp asymmetry and timing fluctuations in control circuits are discussed with important implications to sense amp design. The procedure is outlined in detail using representative circuits and simulations from a 65 nm CMOS bulk technology.