Nand cellular arrays

This paper investigates the properties and utilizations of one- and two-dimensional NAND gate cellular arrays. Both irredundant and redundant one-dimensional cascades are investigated. The cascade's output function is obtained in closed form, and a test and synthesis procedure is developed. Both irredundant and redundant two-dimensional arrays are examined, and an arbitrary two-dimensional array is reduced to a smaller two-row array without loss of generality. It is shown that for i ≫ 1 and n ≫ 1 an i × i + n- 2 array has the same output function as a 2 × n array. An iterative test and synthesis algorithm is presented for the array. It is shown that an arbitrary n-variable switching function may not always be realizable by an array. However, a combination of arrays can always realize an arbitrary switching function. An improved algorithm is provided which realizes an arbitrary n-variable switching function with approximately one-half the number of arrays required by the sum of products method. This is accomplished by expanding the given function with respect to all but (at least) two variables and then absorbing most of the two-variable functions. Other techniques for combining arrays to realize arbitrary switching functions are also presented. The growth rate for arrays is derived and it is shown that, for large n, n2n cells are required to realize an arbitrary n-variable switching function. This growth rate is compared to growth rates for other rectangular arrays. A growth measure is defined which is based not only on the growth rate, but which also includes a measure of cell and wiring complexity.