System-level design aspects of a DAC Calibration technique for bandpass delta-sigma modulators

This paper gives relevant system-level design information for a previously reported technique that digitally compensates for DAC nonlinearities in bandpass delta-sigma modulators. A method is described to optimally determine the noise and signal transfer functions, the lowpass decimation filter cutoff frequency as well as the number of samples required for power estimation. Simulation results confirm the validity of the analysis.