Work Function Controlled Silicide Technology for Submicron CMOS

In small geometry CMOS devices near one micron and below, buried channel structure should suffer from channel leakage current, which is inherent to low work function gate electrode such as n+ poly-Si. Higher work function p+ poly Si is thus more preferable for submicron PMOS. However, p+-poly Si results in buried channel NMOS structure, which naturally degrades NM1OS leakage properties. In principle, variable work function gate material is most desirable to optimize both PMOS and NMOS in submicron CMOS devices.