Trench Isolation Technology and Device Physics

The local oxidation of silicon (LOCOS) is the predominant technique used to isolate laterally between devices in MOS and bipolar integrated circuits. In the drive toward VLSI, attention has been focused on improving the LOCOS process to allow greater packing density by controlling the extent of lateral oxidation and the resulting geometry of the isolation oxide. [1-5] We have investigated the device physics of the parasitic transistors and hence their electrical characteristics. [6] This paper discusses some aspects of isolation technology and the consequences for electrical isolation between devices.