"A 2μm Silicide Gate CMOS Processing for High Performance RAM Circuitries"

With the increase of capacity in semiconductor memories, demands for higher speed and higher density CMOS RAMs have also been growing rapidly, still requiring to maintain their inherent low power advantages. In order to meet the demands I it is necessary to achieve an ingenious combination of advanced process and circuit technologies. In this paper, a hiah speed and low power circuit based on an internally synchronous system, a 2μm silicide gate CMOS process, and their optimized combination as a 16K bit RAM is described.