High Frequency Characterization of Compact N+Poly/Nwell Varactor Using Waffle-Layout

The high frequency characterization of a new waffle layout for N+Poly/Nwell varactor has been studied in STMicroelectronics 65 nm CMOS process. We compare this new waffle layout with model of standard multifingers varactor. In addition to the area saving, the waffle MOS varactor also provides enhancement to the RF merit figure of varactor through the serial resistance and substrate capacitance improvement.