A 10-Gb/s CMOS fully integrated ILO-based CDR

A CDR circuit dedicated to satellite embedded data link is presented. This circuit combines an injection locked oscillator, with a phase alignment circuit, to achieve the clock recovery. The circuit was designed in a 130 nm CMOS process from STMicroelectronics. The working range is from 9.6 Gbit/s up to 10.2 Gbit/s, the power dissipation is 94 mW under 1.2 V power supply. The measured eye opening is 60 ps and 240 mV with a BER lower than 10
¹²
.