Pre-distortion linearizer using self base bias control circuit

The pre-distortion linearizer, which is composed of a RF transistor with a self base bias control circuit, is described. By applying the p-MOSFET current mirror circuit to the self base bias control circuit, the linearizer responds the envelope of the modulated signal. The linearizer realizes both positive and negative gain deviations, and compensates the distortion of any PA’s. The GaAs FET power amplifier (PA), which has negative gain deviation, achieves the adjacent channel power leakage ratio (ACLR) improvement of 8.1dB by using the proposed linearizer for QPSK modulated signal with the chip rate of 3.84Mc/s. Also, the LDMOS PA, which has positive gain deviation, achieves the ACLR improvement of 8.3dB.