Very Low Vt [Ir-Hf]/HfLaO CMOS Using Novel Self-Aligned Low Temperature Shallow Junctions

We report very low V
_t
[Ir-Hf]/HfLaO CMOS using novel self-aligned low-temperature ultra shallow junctions with gate-first process compatible with current VLSI. At 1.2 nm EOT, good ϕ
_m-eff
of 5.3 and 4.1 eV, low V
_t
of +0.05 and 0.03 V, high mobility of 90 and 243 cm
²
/Vs, and small 85°C BTI ≪32 mV (10 MV/cm, 1 hr) are measured for p- and n-MOS.