A Novel Low Leakage-Current Ni SALICIDE Process in nMOSFETs on Si(110) Substrate

A novel low leakage-current Ni SALICIDE process in nMOSFETs on Si(110) is proposed. It is found for the first time that the anomalous off-state leakage-current (I
_off
) in nMOSFETs on Si(110) is caused due to the inherent Ni silicide encroachment toward the channel region. Especially, <110> channel on Si(110) has fatal defect for CMOS fabrication. We propose two methods to suppress the anomalous I
_off
, the creative ingenuity of design layout within SRAM and Si ion implantation (Si I.I.) technique. These two methods are quite effective to realize high performance and low cost CMOS devices on Si(110).